# llms.txt - Gonzalez ASIC Design Studio > URL: https://www.gonzalez.com.uy > Title: Eduardo González - ASIC & Microelectronics Design Studio > Description: Silicon engineering studio specializing in full‑custom and standard‑cell Application‑Specific Integrated Circuit (ASIC) development from RTL to GDSII tape‑out. ## About Us Gonzalez is a silicon engineering studio with 20+ years of expertise in advanced microchip design. We deliver high‑performance, low‑power, and area‑optimized silicon solutions for mission‑critical applications in aerospace, automotive, telecommunications, and medical devices. **Founded:** 2000 **Headquarters:** Punta del Este, Uruguay **Languages:** English, Spanish ## Core Capabilities - **ASIC Design** – Full‑custom and standard‑cell ASICs from RTL to GDSII - **Mixed‑Signal** – High‑precision analog, data converters, PLL, ADCs - **RF & mmWave** – Integrated radio‑frequency circuits for 5G, radar, and satellite - **CAD & Layout** – Advanced physical design, DRC, LVS, EM/IR analysis - **RTL Coding** – Verilog / VHDL with comprehensive verification - **Static Timing Analysis (STA)** – Signoff timing closure - **Design for Testability (DFT)** – Scan insertion, BIST, ATPG - **Prototyping** – FPGA‑based prototyping and emulation ## Technology Nodes | Node | Application | |------|-------------| | 7nm – 180nm | Mixed‑signal, RF, high‑performance digital | | 5nm and below | Advanced AI/ML, high‑density SoC | **EDA Tools:** Synopsys, Cadence, Siemens EDA (Mentor) ## Industries Served - Aerospace & Defense – Radiation‑hardened designs - Automotive – ISO 26262 compliant systems - Medical Devices – High‑reliability implants and robotics - Telecommunications – 5G, radar, satellite communications - Industrial Control – Precision sensors and actuators - IoT & Consumer Electronics – Ultra‑low‑power edge devices ## Our Process 1. **Architecture Definition** – System‑level specification and IP selection 2. **RTL Development** – Synthesis‑ready RTL with simulation and formal verification 3. **Physical Implementation** – Floorplanning, placement, clock tree synthesis, routing 4. **Signoff Verification** – STA, power analysis, DRC, LVS, EM/IR checks 5. **Prototyping** – FPGA‑based prototyping for early software development 6. **Production Support** – Test vector generation, ATE test program development, yield analysis ## Gallery View our portfolio of chip layouts, floorplans, transistor density visualizations, and finished wafer photographs at [https://www.gonzalez.com.uy/#gallery](https://www.gonzalez.com.uy/#gallery) ## Contact - **Website:** [https://www.gonzalez.com.uy](https://www.gonzalez.com.uy) - **Email:** [info@gonzalez.com.uy](mailto:info@gonzalez.com.uy) - **Phone:** +1 (305) 859‑3811 - **Response Time:** 24‑48 hours for initial inquiry ## Key Topics ASIC design, microelectronics, silicon engineering, full‑custom ASIC, standard‑cell ASIC, RTL design, physical design, tape‑out, GDSII, semiconductor, FPGA prototyping, mixed‑signal, system‑on‑chip, SoC, Uruguay, Latin America, nearshoring